Legacy memory - Rationed by the AI Boom

EXECUTIVE BRIEF: Legacy memory is under pressure caused by the AI boom. This paper seeks to show why this is happening and what to do about it.

172% DRAM price increase across 2025, with further rises forecast through 2026

30+ weeks Lead times for industrial-grade memory modules, up from a historical 8–10

23% Share of global DRAM wafer capacity now consumed by HBM — up from 8%

The Unforeseen Inversion

In the second half of 2025, a pricing anomaly appeared that appeared to be improbable: in some configurations, legacy DDR4 memory began trading above newer, faster, more capable DDR5. Mature technology, fully depreciated fabs, a decade of manufacturing learning — and rising prices. Markets do not normally reward obsolescence. This one did, because the market was no longer allocating wafers by generation. It was allocating them by proximity to artificial intelligence.

The consequence lands squarely on operational technology. OT owns the longest-lived electronic assets in the economy — PLCs, safety controllers, protection relays and industrial computers with 20-to-30-year field lives. Those assets are now being rationed by the shortest-lived assets in the economy: AI accelerators that are economically stale for three to five years. The AI buildout did not merely raise memory prices. It restructured who gets the wafers, and every long-lifecycle program is on the wrong side of that restructuring.

Here we examine how the allocation broke, why the DDR4 end-of-life sequence unfolded the way it did, and what a disciplined response looks like for organizations whose products must outlive the components inside them.

How AI Broke the Allocation

Three companies — Samsung, SK Hynix, and Micron — control more than 95% of global DRAM production. Beginning in 2024 and accelerating sharply through 2025, all three redirected manufacturing capacity toward High Bandwidth Memory, the specialized stacked DRAM that feeds AI accelerators. The economics were not subtle: HBM commands roughly three to five times the revenue per wafer of conventional DDR5. Faced with that spread, the triopoly did what rational capital allocators do. HBM's share of DRAM wafer capacity nearly tripled, from 8% to 23%, and every wafer that moved came out of the conventional supply that PCs, servers, and industrial systems depend on.

It is important to frame this correctly. This is not a demand shock, a fab fire, or a pandemic logistics failure. It is a manufactured scarcity produced by deliberate, margin-driven capacity reallocation — and it will persist precisely as long as margins remain attractive, which analysts currently project through at least 2027. The secondary effects compounded quickly: some NAND lines were converted to DRAM to chase the same margins, at least one major NAND manufacturer presold its entire 2026 output, and by February 2026 SK Hynix had secured demand for its full year of RAM production before the year had barely begun.

The demand side hardened as well. Hyperscalers pay premiums and sign multi-year supply agreements to lock capacity, and estimates suggest data centers could account for as much as 70% of total memory consumption by the end of 2026. For everyone else, allocation-only ordering is the new norm: contracted volumes ship, discretionary orders wait. Spot availability has thinned to the point that lead times which historically ran 8–10 weeks now stretch past 20 for mainstream parts and past 30 for industrial-grade modules. DRAM prices rose approximately 172% across 2025, with forecasts of a further 30–40% in 2026 concentrated in exactly the segments OT buys: DDR4 and lower-density DDR5.

This is not a shortage in the classical sense. It is a rationing regime — and industrial buyers sit at the back of the queue.

The DDR4 Whiplash

DDR4 deserves particular attention because of what it is: the workhorse standard of an entire computing generation. It shipped with Intel Skylake platforms in 2015, became the default for mainstream compute in 2017, and still powers the majority of installed business PCs, servers, and industrial computers in service today. A long tail of industrial, embedded, networking, and automotive designs — many of them qualified, certified, and expected to remain in the field for decades — is built on it. Through 2024 it was the cheapest, most available memory on the market.

The end-of-life sequence that followed was fast, uncoordinated, and in one case openly opportunistic:

•    SK Hynix issued end-of-life notices for DDR4 and LPDDR4 in mid-2025, with final mainstream shipments tapering into early 2026, reserving leading-edge nodes for DDR5, LPDDR5, and HBM.

•    Micron announced last orders in late 2025, with final DDR4 shipments landing around April 2026 — while temporarily boosting output at older lines to capture the price spike on the way out.

•    Samsung announced EOL intentions, watched DDR4 prices surge on the announcement itself, then reversed course and extended production through December 2026 — reportedly under non-cancellable, non-returnable contract terms, and with no new lines added. An EOL announcement became, functionally, a scarcity-pricing instrument.

For qualification-heavy environments, the sequence matters as much as the outcome. A component generation that anchors certified configurations was sunset while still at peak deployment — not at the end of its service relevance, but at the peak of a competing product's margins. And the formal notices are only part of the exposure: industry analysis indicates that nearly 30% of EOL events in recent years occurred without any formal product change notification at all. An OT installed base can be accruing obsolescence risk it literally cannot see.

The Lifecycle Asymmetry between IT and OT

There is a mirror image to this story on the demand side, and it is worth a look because it explains both the cause of the squeeze and the conditions under which it might end.

The AI infrastructure world is currently consumed by a debate over how long its own hardware lasts. Hyperscalers depreciate GPU fleets over five to six years; prominent critics — most visibly Michael Burry — argue the real economic life is closer to two or three, given an annual accelerator cadence in which each generation delivers roughly 40–50% better performance per dollar. By Burry's estimate, the gap is worth some $176 billion in understated depreciation across 2026–2028. The industry's defense is the “compute waterfall”: aging chips cascade from frontier training down to inference and batch workloads. The truth likely sits between the two — but even Microsoft's CEO has acknowledged not wanting to be “stuck” with years of depreciation on a single chip generation.

For IT and OT the lifecycles are dramatically different:

•    The AI side purchases silicon with a contested 3-to-6-year economic life, funds it increasingly with debt of longer maturity than the asset and must re-invest continuously just to hold position.

•    The OT side deploys systems with 20-to-30-year field lives, backed by safety cases, certifications, and spares strategies that assume component availability measured in decades — against active-component lifecycles that now run 5–10 years, and shrinking.

The industry with the longest asset lives — aerospace, defense, medical, rail, energy, industrial automation — have always lived with this mismatch. What has changed is the magnitude and the mechanism: the mismatch is now being actively widened by the most capital-intensive buildout in technology history; one whose own asset-life assumptions are unstable.

The Decision Framework

When a critical memory component enters end-of-life, the standard playbook offers three moves: a last-time buy, a qualified cross to a form-fit-function alternate, or a redesign. Generic obsolescence guidance treats these as roughly interchangeable levers. In safety-critical and regulated environments, they are not — and the current cycle has broken the assumptions behind the first one.

The last-time buy is under stress

The textbook LTB calculation is straightforward: remaining product lifecycle years, multiplied by annual consumption, multiplied by a safety factor of 1.2–1.5, bounded by component shelf life. The mechanics assume a functioning market around the purchase. That assumption no longer holds. Typical LTB windows run 90–180 days — against lead times now exceeding 30 weeks and allocation regimes that prioritize contracted hyperscaler volume. The window can close before a normal procurement cycle completes. Overbuying ties up capital in depreciating inventory with real shelf-life limits; underbuying re-creates the crisis with fewer options and higher prices. And the fallback — the grey market — carries inflated pricing, uncertain traceability, and counterfeit risk that no safety-critical program should absorb casually, least of all under the supplier-integrity expectations of IEC 62443 and the EU Cyber Resilience Act.

The requalification tax

The alternative paths carry a cost that generic guidance systematically understates. In a consumer product, swapping a memory device is an engineering task. In an IEC 61508, ISO 26262, or DO-178C context, even a nominally “drop-in” replacement triggers impact analysis, and anything beyond it — a die shrink, a timing change, a migration from DDR4 to LPDDR4 or DDR5 — can reopen EMC testing, environmental qualification, and elements of the safety case itself. Redesigning around a modern MCU with integrated flash and SRAM, one of the commonly cited escape routes, is in certified environments a re-certification program wearing a redesign's clothing. The decision framework must therefore price three distinct quantities: the carrying cost of inventory, the market cost of the cross, and the evidence cost of change. In regulated OT, the third routinely dominates — and it is the one most often missing from the spreadsheet.

What OT vendors should do

The differentiator is planning for redesign refresh regularly. Organizations running proactive component-replacement protocols report roughly 67% fewer unplanned redesign cycles than reactive peers. The pattern among them is consistent: obsolescence management operates as a continuous lifecycle activity in the spirit of IEC 62402 rather than a fire drill; every BOM line carries a lifecycle status and a criticality ranking; PCN and EOL feeds route to responsible engineers rather than shared inboxes; and — the highest-leverage move — form-fit-function alternates for critical-path components are qualified before they are needed. A pre-qualified cross, held on the approved vendor list with its evidence package already assembled, converts a future crisis into a planned engineering change. In the current market it is worth an order of magnitude more than an emergency cross-reference performed inside a closing LTB window.

We have other articles in this series in terms of how to manage LTBs and redesign windows. OT Vendors are used to doing this. With products that last decades it is inevitable that electronic components become obscolete and force an LTB and/or redesign depending on projected sunsetting of the product. This is, in fact, part and parcel to delivering products into an industry where expectations are that they are actively sold and supported for decades.

Back to the legacy memory shortage. The legacy memory shortage is not likely to alleviate even if AI driven data center build out becomes more of a bust than a boom. It is our take that even in the case of a bust the fab capacity will not revert to legacy memory. Instead it will be more focused on the latest memory technologies (ie DDR5 and equivalents). If this holds then our recommendation is to redesign earlier rather later for products that have a longer sunset cycle so that savings can be realized while the product has a long lived commercial life. There are a couple of positives that come from this beyond more immediate cost savings. First, this redesign could extent the product longevity. Second, it may open up opportunties for further cost reductions in the product. Of course all of this has to be weighed against the costs talked about earlier with requalifaction and certification to applicable products.